概述：
 74HC595 是一款漏极开路输出的CMOS 移位寄存器，输出端口为可控的三态输出 端，亦能串行输出控制下一级级联芯片。
 特点：
 􀁺 高速移位时钟频率Fmax>25MHz
 􀁺 标准串行（SPI）接口
 􀁺 CMOS 串行输出，可用于多个设备的级联
 􀁺 低功耗：TA =25℃时，Icc=4μA（MAX）

引脚功能表：

管脚编号

1、2、3、4、5、6、7、15

8

9

10

11

12

13

14

15

          图1 74HC595引脚图

                         图2 74HC595逻辑图

Absolute Maximum Ratings绝对最大额定值参数数值Supply Voltage电源电压(VCC)−0.5 to +7.0VDC Input Voltage 直流输入电压(VIN)−1.5 to VCC +1.5VDC Output Voltage 直流输出电压(VOUT)−0.5 to VCC +0.5VClamp Diode Current 钳位二极管电流(IIK, IOK)±20mADC Output Current直流输出电流，每个引脚（输出）±35mADC VCC or GND Current,per pin (ICC)±70mAStorage Temperature Range 储存温度范围(TSTG)−65℃ to +150℃Power Dissipation 功耗(PD)(Note 3)600mWS.O. Package only500mWLead Temperature (TL) (Soldering 10 seconds)260℃

DC SPECIFICATIONS直流电气规格Symbol 符号Parameter 参数Conditions  条件VCCTA=25℃TA= −40to85℃TA= −55to125℃UNIT 单位典型Guaranteed Limits保证界限VIHMinimum High Level Input Voltage最大高电平输入电压-2.0V-1.51.51.5V4.5V-3.153.153.156.0V-4.24.24.2VILMaximum LOW Level Input Voltage最大低电平输入电压-2.0V-0.50.50.5V4.5V-1.351.351.356.0V-1.81.81.8VOHMinimum HIGH Level Output Voltage最大高电平输出电压VIN=VIH or VIL|IOUT|≤20μA2.0V2.01.91.91.9V4.5V4.54.44.44.46.0V6.05.95.95.9Q'HVIN = VIH or VILV|IOUT| ≤4.0mA 4.5V 4.2 3.98 3.84 3.7 |IOUT| ≤5.2mA6.0V5.25.485.345.2QA thru QHVIN = VIH or VILV|IOUT| ≤6.0mA4.5V 4.2 3.98 3.84 3.7 IOUT| ≤ 7.8mA6.0V5.75.485.345.2VOLMaximum LOW Level Output Voltage最大低电平输出电压VIN=VIH or VIL|IOUT| ≤ 20μA2.0V00.10.10.1V4.5V00.10.10.16.0V00.10.10.1Q'HVIN = VIH or VIL V|IOUT| ≤ 4mA 4.5V 0.2 0.26 0.33 0.4|IOUT| ≤5.2mA6.0V0.20.260.33 0.4QA thru QHVIN = VIH or VIL V|IOUT| ≤6.0mA 4.5V 0.20.26 0.33 0.4 |IOUT| ≤7.8mA6.0V0.20.260.330.4IINMaximum Input Current最大输入电流VIN=VCC or GND6.0V-±0.1±1.0±1.0μAIOZMaximum 3-STATE Output Leakage最大3态输出泄漏电流VOUT = VCC or GND G = VIH6.0V-±0.5±5.0±10μAICCMaximum Quiescent Supply Current电源电流VIN=VCC or GND IOUT = 0μA6.0V-8.080160μA

交流电气特性：Symbol 符号Parameter 参数Conditions 条件典型Guaranteed LimitUNIT 单位fMax最高工作频率-5030MHztPHL, tPLHMaximum Propagation Delay,最大传输延迟 SCK to Q’ HCL = 45 pF1220nstPHL, tPLHMaximum Propagation Delay, 最大传输延迟RCK to QA thru QHCL = 45 pF1830nstPZH, tPZLMaximum Output Enable Time from G to QA thru QH 最大输出启用时间G to QA thru QHRL=1kΩ CL=45pF1728nstPHZ, tPLZMaximum Output Disable Time from G to QA thru QH最大输出禁用时间G to QA thru QHRL=1kΩ CL=5pF1525nstSMinimum Setup Time from SER to SCK--20nstSMinimum Setup Time from SCLR to SCK--20nstSMinimum Setup Time from SCK to RCK--40nstHMinimum Hold Time from SER to SCK--0nstWMinimum Pulse Width of SCK or RCK--16ns

交流电气特性：（续）Symbol 符号Parameter 参数Conditions 条件VCCTA = 25℃TA = −40 to 85℃TA = −55 to 125℃UNIT 单位典型Guaranteed Limits  保证界限fMaxMaximum Operating Frequency最高工作频率CL = 50 pF2.0V1064.84.0MHz4.5V453024206.0V50352824tPHL, tPLHMaximum Propagation Delay from SCK to Q’ H最大传输延迟传播延迟CK to QCL = 50 pF 2.0V 58 210 265 315 nsCL = 150 pF2.0V83294367441CL = 50 pF 4.5V 14 42 53 63 CL = 150 pF4.5V17587488CL = 50 pF6.0V 10 36 45 54 CL = 150 pF6.0V14506376tPHL, tPLHMaximum Propagation Delay from RCK to QA thru QHCK to QCK to Q最大传输延迟RCK to QA thru QHCK to QCK to QCL = 50 pF 2.0V 70 175 220 265 nsCL = 150 pF2.0V105245306368CL = 50 pF 4.5V 21 3544 53 CL = 150 pF4.5V28496174CL = 50 pF 6.0V 18 30 37 45 CL = 150 pF6.0V26425363tPHL, tPLHMaximum Propagation Delay from SCLR to Q’ H最大传输延迟to Q’ H-2.0V-175221261ns4.5V-3544526.0V-303744tPZH, tPZLMaximum Output Enable from G to QA thru QH最大输出启用RL=1kΩ CL=50pF 2.0V 75 175 220 265 nsRL=1kΩ CL=150pF2.0V100245306368CL= 50pF 4.5V 15 35 44 53 CL = 150pF4.5V20496174CL = 50 pF6.0V13303745CL = 150 pF6.0V17425363CPDPower Dissipation Capacitance, OutputsEnabled (Note 6)功耗电容G = VCC -90 ---pFG = GND150---CINMaximum Input Capacitance最大输入电容--5101010pFCOUTMaximum Output最大输出电容--15202020pF

                             图3 74HC595 时序图图     

应用电路图：

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